Self-testing of cores-based embedded systems with built-in hardware

One obvious way to significantly improve the testability of evolving embedded cores-based system-on-a-chip (SoC) and save testing time is to use built-in self-testing (BIST), where the basic idea is to have the chip test itself. This technique generates test patterns and evaluates test responses inside the chip system. The technique has been widely used in commercial VLSI products with appreciable success. The general methodology of BIST in the particular context of today´s cores-based SoC technology is presented.