DocumentCode
1198073
Title
A High-Stability Low-Offset Phase-Locked-Loop Frequency Synthesizer
Author
Benard, David J.
Volume
24
Issue
3
fYear
1975
Firstpage
222
Lastpage
224
Abstract
Small offsets in frequency from a given reference can be generated in a single sideband mixer employing a PLL. It is shown that the output frequency stability depends linearly on the fractional shift of the offset frequency generated, and on the coherence of the VCO. For the typical digital phase-locked loop synthesizer techniques, employing a crystal-stabilized VCO at 5 MHz, a 500-Hz offset can be realized with a 1-s frequency stability no better than a few parts in 107. An improved design is described which employs a pair of analog multipliers as an instantaneous phase detector together with feedback in quadrature. In laboratory tests this design demonstrated one second frequency stability of better than 1 part in 1010 when synthesizing the frequency 4.9995776 MHz from a 5.0-MHz cesium reference.
Keywords
Control system synthesis; Error correction; Filters; Frequency modulation; Frequency synthesizers; Phase detection; Phase frequency detector; Phase locked loops; Stability; Voltage-controlled oscillators;
fLanguage
English
Journal_Title
Instrumentation and Measurement, IEEE Transactions on
Publisher
ieee
ISSN
0018-9456
Type
jour
DOI
10.1109/TIM.1975.4314413
Filename
4314413
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