DocumentCode
1199245
Title
Uniform-phase uniform-amplitude resonant-load global clock distributions
Author
Chan, S.C. ; Shepard, K.L. ; Restle, P.J.
Author_Institution
Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
Volume
40
Issue
1
fYear
2005
Firstpage
102
Lastpage
109
Abstract
This work presents a new approach to global clock distribution in which tree-driven grids are augmented with on-chip spiral inductors to resonate the clock capacitance. In this scheme, the energy of the fundamental frequency resonates between electric and magnetic forms, with the reduced admittance of the clock network allowing for significantly lower gain requirements in the buffering network. The substantial improvements in jitter and power resulting from this approach are presented using measurement results from two test chips, one fabricated in a 90-nm and the other in a 0.18-/spl mu/m CMOS technology.
Keywords
CMOS integrated circuits; clocks; inductors; integrated circuit design; integrated circuit measurement; 0.18 micron; 90 nm; CMOS technology; buffering network; clock capacitance; clock network; electric forms; magnetic forms; on-chip spiral inductors; resonant clocking; timing circuits; tree-driven grids; uniform-phase uniform-amplitude resonant-load global clock distributions; Admittance; CMOS technology; Capacitance; Clocks; Inductors; Jitter; Magnetic resonance; Power measurement; Resonant frequency; Spirals; Clock distribution; inductance; jitter; resonant clocking; skew; timing circuits;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2004.838005
Filename
1374995
Link To Document