DocumentCode :
1199266
Title :
Analog circuits in ultra-deep-submicron CMOS
Author :
Annema, Anne-Johan ; Nauta, Bram ; Van Langevelde, Ronald ; Tuinhout, Hans
Author_Institution :
IC Design Group, Univ. of Twente, Enschede, Netherlands
Volume :
40
Issue :
1
fYear :
2005
Firstpage :
132
Lastpage :
143
Abstract :
Modern and future ultra-deep-submicron (UDSM) technologies introduce several new problems in analog design. Nonlinear output conductance in combination with reduced voltage gain pose limits in linearity of (feedback) circuits. Gate-leakage mismatch exceeds conventional matching tolerances. Increasing area does not improve matching any more, except if higher power consumption is accepted or if active cancellation techniques are used. Another issue is the drop in supply voltages. Operating critical parts at higher supply voltages by exploiting combinations of thin- and thick-oxide transistors can solve this problem. Composite transistors are presented to solve this problem in a practical way. Practical rules of thumb based on measurements are derived for the above phenomena.
Keywords :
CMOS analogue integrated circuits; integrated circuit design; low-power electronics; active cancellation techniques; analog circuits; analog design; composite transistors; feedback circuits; gate-leakage mismatch; nonlinear output conductance; power consumption; supply voltages; thick-oxide transistors; thin-oxide transistors; ultra-deep-submicron CMOS; voltage gain; Analog circuits; CMOS analog integrated circuits; CMOS digital integrated circuits; CMOS technology; Energy consumption; Gate leakage; Leakage current; MOSFETs; Signal processing; Voltage; Analog design; CMOS; UDSM; breakdown; distortion; evolution; future performance; gate leakage; low power; low voltage; mismatch; scaling; technology;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2004.837247
Filename :
1374997
Link To Document :
بازگشت