DocumentCode :
1199404
Title :
Properties Incompleteness Evaluation by Functional Verification
Author :
Fedeli, Andrea ; Fummi, Franco ; Pravadelli, Graziano
Author_Institution :
STMicroelectron., Agrate
Volume :
56
Issue :
4
fYear :
2007
fDate :
4/1/2007 12:00:00 AM
Firstpage :
528
Lastpage :
544
Abstract :
Verification engineers cannot guarantee the correctness of the system implementation by model checking if the set of proven properties is incomplete. However, the use of model checking lacks widely accepted coverage metrics to evaluate the property completeness. The already existing metrics are based on time-consuming formal approaches that cannot be efficiently applied to medium/large systems. In this context, the paper proposes a coverage methodology based on a combination of static and dynamic verification that allows us to reduce the evaluation time with respect to pure formal approaches. The joining point between static and dynamic verification is represented by a fault model targeting functional descriptions. Functional fault simulation and dynamic automatic test pattern generation are used to quickly estimate the capability of properties in detecting functional faults. This provides a first estimation of the property completeness. Then, if necessary, model checking is used to complete the analysis, avoiding the underestimation of the property coverage that can be obtained due to the lack of exhaustiveness of dynamic verification. The proposed approach is theoretically founded and its effectiveness is compared with already existing techniques. In addition, experimental results to confirm the theoretical results are provided
Keywords :
automatic test pattern generation; formal verification; dynamic automatic test pattern generation; dynamic verification; functional fault simulation; functional verification; model checking; time-consuming formal approach; Automatic test pattern generation; Computer bugs; Debugging; Design engineering; Digital systems; Fault detection; Formal verification; Helium; Logic design; Mathematical model; Model checking; fault models.; functional verification; property coverage;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.2007.1012
Filename :
4118675
Link To Document :
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