Title :
A 28.8 Mb/s 4 × 4 MIMO 3G CDMA receiver for frequency selective channels
Author :
Garrett, David ; Woodward, Graeme K. ; Davis, Linda ; Nicol, Chris
Abstract :
This paper describes a silicon receiver for a multiple-input multiple-output (MIMO) wireless channel that supports up to 28.8 Mb/s using a 4 × 4 QPSK configuration over a 5-MHz frequency selective channel. The architecture has two key components: a space-time equalizer that mitigates both spatial and temporal effects of the channel, and a maximum likelihood detector with approximate a posterior probability (ML-APP) soft estimates of the transmit vectors over the MIMO configuration. The space-time equalizer uses an adaptive tap training process that includes a pilot correlator to reduce adaptation noise. The device is 685 k effective logic gates (11.6 mm2) in 0.18-μm 6LM CMOS.
Keywords :
3G mobile communication; CMOS integrated circuits; MIMO systems; adaptive equalisers; code division multiple access; maximum likelihood detection; quadrature phase shift keying; radio receivers; telecommunication channels; 0.18 micron; 28.8 Mbit/s; 4×4 QPSK configuration; 5 MHz; MIMO 3G CDMA receiver; adaptation noise; adaptive equalizers; adaptive tap; approximate a posterior probability; communication terminals; frequency selective channels; maximum likelihood detector; mobile communications; multiple-input multiple-output wireless channel; pilot correlator; silicon receiver; space-time equalizer; CMOS logic circuits; Detectors; Equalizers; Frequency; MIMO; Maximum likelihood detection; Maximum likelihood estimation; Multiaccess communication; Quadrature phase shift keying; Silicon; Adaptive equalizers; HSDPA; MIMO systems; NLMS; communication terminals; equalization; maximum likelihood detection; mobile communications;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2004.837931
