Three-dimensional resist process simulator PEACE (photo and electron beam lithography analyzing computer engineering system)

Author

Hirai, Yoshihiko ; Tomida, Sadafumi ; Ikeda, Kazushi ; Sasago, Masaru ; Endo, Masayki ; Hayama, Sigeru ; Nomura, Noboru

Author_Institution

Matsushita Electr. Ind. Co. Ltd., Osaka, Japan

Volume

10

Issue

6

fYear

1991

fDate

6/1/1991 12:00:00 AM

Firstpage

802

Lastpage

807

Abstract

A three-dimensional topographical simulator PEACE (photo and electron beam lithography analyzing computer engineering system) is discussed. One of the difficulties in resist topographical simulation exists due to the three-dimensional resist development algorithm. An algorithm based on the cell removal model provides accurate and stable results for the three-dimensional resist development process. The program has been adapted to a supercomputer for quick computation. The simulator can successfully perform the three-dimensional development in an absolutely stable manner, and good agreement can be obtained with experiments for both photo and electron beam lithography

Keywords

digital simulation; electron beam lithography; electronic engineering computing; photolithography; 3D simulation; PEACE; analyzing computer engineering system; cell removal model; electron beam lithography; resist process simulator; supercomputer; three-dimensional topographical simulator; Analytical models; Computational modeling; Computer simulation; Electron beams; Lithography; Optical device fabrication; Optical diffraction; Resists; Supercomputers; Systems engineering and theory;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/43.137508

Filename

137508