DocumentCode

1200290

Title

Reducing Computation Time in the Analysis of Networks by Digital Computer

Author

Mayeda, W.

Volume

6

Issue

1

fYear

1959

fDate

3/1/1959 12:00:00 AM

Firstpage

136

Lastpage

137

Keywords

Circuit synthesis; Circuit theory; Computer networks; Military computing; Network synthesis; Passive networks; Tree graphs;

fLanguage

English

Journal_Title

Circuit Theory, IRE Transactions on

Publisher

ieee

ISSN

0096-2007

Type

jour

DOI

10.1109/TCT.1959.1086512

Filename

1086512