DocumentCode
1200479
Title
Maximally-Flat Time Delay Ladders
Author
Deutsch, Sid
Volume
6
Issue
2
fYear
1959
fDate
6/1/1959 12:00:00 AM
Firstpage
214
Lastpage
218
Abstract
The driving-point impedance for a maximally-flat time delay response is derived. The impedance is synthesized as an infinite low-pass LC ladder that starts with an
-farad shunt capacitor The ladder elements rapidly taper toward a capacitance of
farads and an inductance of
henries. The impulse and step responses of the impedance are derived as a series of Bessel functions. A three-terminal maximally-flat time delay transfer impedance is also considered. The conditions for a smoothly-tapering ladder structure are given. The transfer impedance is synthesized as an infinite low-pass LC ladder whose first two shunt capacitors are
and
farads, respectively. The impulse and step responses of the transfer impedance are also derived.
-farad shunt capacitor The ladder elements rapidly taper toward a capacitance of
farads and an inductance of
henries. The impulse and step responses of the impedance are derived as a series of Bessel functions. A three-terminal maximally-flat time delay transfer impedance is also considered. The conditions for a smoothly-tapering ladder structure are given. The transfer impedance is synthesized as an infinite low-pass LC ladder whose first two shunt capacitors are
and
farads, respectively. The impulse and step responses of the transfer impedance are also derived.Keywords
Bibliographies; Circuit theory; Crystals; Delay effects; Feedback amplifiers; Filters; Impedance; Network synthesis; Phased arrays; Wideband;
fLanguage
English
Journal_Title
Circuit Theory, IRE Transactions on
Publisher
ieee
ISSN
0096-2007
Type
jour
DOI
10.1109/TCT.1959.1086532
Filename
1086532
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