High-voltage management in single-supply CHE NOR-type flash memories

Author

Motta, Ilaria ; Ragone, Giancarlo ; Khouri, Osama ; Torelli, Guido ; Micheloni, Rino

Author_Institution

Memory Product Group, STMicroelectronics, Agrate Brianza, Italy

Volume

91

Issue

4

fYear

2003

fDate

4/1/2003 12:00:00 AM

Firstpage

554

Lastpage

568

Abstract

In a flash memory, a number of voltage levels different from V_DD are needed to perform the required operations (read, program, and erase) on the array cells. In the case of single-supply memory devices, voltages higher than V_DD as well as negative voltages, which are referred to as high voltages (HVs), must be produced on-chip. This paper aims at giving the reader an overview of how HVs are generated and managed in single-supply NOR-type flash memories programmed by channel hot-electron injection. Both schemes used for conventional (i.e., bilevel) memory devices and schemes designed to meet multilevel memory requirements are addressed.

Keywords

flash memories; hot carriers; memory architecture; storage management; bilevel memory devices; channel hot-electron injection programming; drain voltage regulation; gate voltage regulation; hierarchical decoders; high-voltage management; multilevel memory requirements; negative voltages; single-supply CHE NOR-type flash memories; single-supply memory devices; staircase gate voltage generation; standby management; Channel hot electron injection; Decoding; Flash memory; Hip; Joining processes; Logic programming; Memory management; Nonvolatile memory; Standby generators; Threshold voltage;

fLanguage

English

Journal_Title

Proceedings of the IEEE

Publisher

ieee

ISSN

0018-9219

Type

jour

DOI

10.1109/JPROC.2003.811706

Filename

1199083