The HIMOS flash technology: the alternative solution for low-cost embedded memory

The high-injection MOS (HIMOS) technology was initially developed as an application-specific memory technology, i.e., a nonvolatile block-erasable (Flash-type) memory for embedded applications. The label "embedded" points out that cost was considered to be the prime issue. Because of this, processing complexity and voltage reduction have been the major driving forces in the cell and process development rather than mere cell size scaling. Indeed, what really counts in embedded applications is the chip area per megabit rather than the cell size itself. Because the substantially high operating voltages of floating-gate-based memories are not being scaled, the peripheral area becomes the main bottleneck for most embedded applications. Also, cost has to be viewed in terms of masking steps and complexity or marginality of processing in general, especially in the case of embedded Flash, since the envisaged products have to be incorporated in a conventional CMOS line. To achieve this goal, a split-gate approach was adopted, which, combined with an additional program gate (PG), leads to maximized hot-electron efficiency at low voltages. As an additional major advantage, this PG allows the use of an electrically erasable programmable ROM-like threshold voltage window. This implies that the high threshold needs to be only slightly positive, while the low one could be strongly negative. Such a scheme allows very low excess charge levels (especially in the more critical off state), which greatly improves device reliability, while allowing further scaling of the tunnel oxide as compared with other Flash concepts. This allows further reduction of the program/erase voltages. Also, such a window provides a larger read current, which removes the necessity for wordline boosting during readout and therefore improves access time.