An auto-I/Q calibrated CMOS transceiver for 802.11g

Author

Hsieh, Yong-Hsiang ; Hu, Wei-Yi ; Lin, Shin-Ming ; Chao-Liang Chen ; Li, Wen-Kai ; Sao-Jie Chen ; Chen, David J.

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

Volume

40

Issue

11

fYear

2005

Firstpage

2187

Lastpage

2192

Abstract

The CMOS transceiver IC exploits the superheterodyne architecture to implement a low-cost RF front-end with an auto-I/Q calibration function for IEEE 802.11g. The transceiver supports I/Q gain and phase mismatch auto tuning mechanisms at both the transmitting and receiving ends, which are able to reduce the phase mismatch to within 1° and gain mismatch to 0.1dB. Implemented in a 0.25 μm CMOS process with 2.7 V supply voltage, the transceiver delivers a 5.1 dB receiver cascade noise figure, 7 dBm transmit, and a 1 dB compression point.

Keywords

CMOS integrated circuits; IEEE standards; integrated circuit design; radiofrequency integrated circuits; transceivers; 0.1 dB; 0.25 micron; 2.7 V; 5.1 dB; CMOS transceiver integrated circuit; DC offset cancellation; IEEE 802.11g; RF transceiver; auto calibration; auto tuning mechanisms; gain mismatch; phase mismatch; superheterodyne architecture; Baseband; Calibration; Circuit testing; Demodulation; Filters; OFDM modulation; Radio frequency; Switches; Transceivers; Voltage; 802.11g; Auto calibration; DC offset cancellation; RF transceiver; gain mismatch; phase mismatch;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2005.857348

Filename

1522558