DocumentCode
1202934
Title
Dynamic Context Compression for Low-Power Coarse-Grained Reconfigurable Architecture
Author
Kim, Yoonjin ; Mahapatra, RabiN
Author_Institution
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
Volume
18
Issue
1
fYear
2010
Firstpage
15
Lastpage
28
Abstract
Most of the coarse-grained reconfigurable architectures (CGRAs) are composed of reconfigurable ALU arrays and configuration cache (or context memory) to achieve high performance and flexibility. Specially, configuration cache is the main component in CGRA that provides distinct feature for dynamic reconfiguration in every cycle. However, frequent memory-read operations for dynamic reconfiguration cause much power consumption. Thus, reducing power in configuration cache has become critical for CGRA to be more competitive and reliable for its use in embedded systems. In this paper, we propose dynamically compressible context architecture for power saving in configuration cache. This power-efficient design of context architecture works without degrading the performance and flexibility of CGRA. Experimental results show that the proposed approach saves up to 39.72% power in configuration cache with negligible area overhead (2.16%).
Keywords
cache storage; embedded systems; reconfigurable architectures; coarse-grained reconfigurable architecture; configuration cache; dynamic context compression; embedded system; power-efficient design; Coarse-grained reconfigurable architecture (CGRA); configuration cache; context architecture; embedded system; low power;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2008.2006846
Filename
4804672
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