DocumentCode
1203885
Title
Review of ´Iterative Arrays of Logical Circuits´
Author
Kilmer, W.
Volume
9
Issue
1
fYear
1962
fDate
3/1/1962 12:00:00 AM
Firstpage
100
Lastpage
101
Keywords
Algorithm design and analysis; Automata; Books; Computer networks; Delay; Integrated circuit interconnections; Iterative algorithms; Logic arrays; Nearest neighbor searches; Steady-state;
fLanguage
English
Journal_Title
Circuit Theory, IRE Transactions on
Publisher
ieee
ISSN
0096-2007
Type
jour
DOI
10.1109/TCT.1962.1086879
Filename
1086879
Link To Document