DocumentCode :
12040
Title :
The Movidius Myriad Architecture´s Potential for Scientific Computing
Author :
Ionica, Mircea Horea ; Gregg, David
Author_Institution :
Trinity Coll. Dublin, Dublin, Ireland
Volume :
35
Issue :
1
fYear :
2015
fDate :
Jan.-Feb. 2015
Firstpage :
6
Lastpage :
14
Abstract :
In recent years, a new generation of ultralow-power processors have emerged that are aimed primarily at signal processing in mobile computing. However, their architecture could make some of these useful for other applications. Algorithms originally developed for scientific computing are used increasingly in signal conditioning and emerging fields such as computer vision, increasing the demand for computing power in mobile systems. In this article, the authors describe the design and implementation of dense matrix multiplication on the Movidius Myriad architecture and evaluate its performance and energy efficiency. The authors demonstrate a performance of 8.11 Gflops on the Myriad I processor and a performance/watt ratio of 23.17 Gflops/W for a key computational kernel. These results show significant potential for scientific-computing tasks and invite further research.
Keywords :
computer architecture; matrix algebra; microprocessor chips; performance evaluation; power aware computing; Movidius Myriad Architecture; Myriad I processor; computer vision; computing power; dense matrix multiplication; energy efficiency; mobile computing; mobile systems; performance efficiency; performance-watt ratio; scientific computing; signal conditioning; signal processing; ultralow power processors; Linear algebra; Low power electronics; Mobile communication; Multicore processing; Program processors; Random access memory; linear algebra; low power; mobile processor; multicore;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/MM.2015.4
Filename :
7006377
Link To Document :
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