DocumentCode
1204440
Title
Performance comparison of switch architectures with shareable parallel memory modules
Author
Kumar, Sanjeev ; Munoz, Alvaro
Author_Institution
Dept. of Electr. Eng., Univ. of Texas-Pan American, Edinburg, TX, USA
Volume
9
Issue
11
fYear
2005
Firstpage
1015
Lastpage
1017
Abstract
The class of switches with shareable parallel memory modules include those switches that use parallel memory modules which are physically separate but logically shared. The two main classes of such architectures namely the Shared Multibuffer (SMB) based switch and the Sliding-Window (SW) based packet switch both deploy shareable parallel memory modules, however they differ in the switching scheme used by them to store incoming packets and transfer packets among different switch ports. In this letter, we investigate and compare the performance of switching schemes deployed by these two classes of switching architectures. We compare throughput and packet loss performance of these two switches under conditions of identical traffic type, switch configuration and memory resource deployed.
Keywords
buffer storage; packet switching; parallel memories; shared memory systems; telecommunication traffic; SMB; SW; bursty traffic; memory bandwidth; packet switch; packet-loss performance; shareable parallel memory module; shared multibuffer; sliding-window; switch architecture; switch class; Bandwidth; Centralized control; Communication switching; Control systems; IEEE members; Packet switching; Performance loss; Switches; Switching systems; Throughput;
fLanguage
English
Journal_Title
Communications Letters, IEEE
Publisher
ieee
ISSN
1089-7798
Type
jour
DOI
10.1109/LCOMM.2005.11021
Filename
1524597
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