Title :
Design of CMOS self-checking sequential circuits with improved detectability of bridging faults
Author :
Metra, C. ; Favalli, Michele ; Ricco, Bruno
Author_Institution :
DEIS, Bologna Univ.
fDate :
11/10/1994 12:00:00 AM
Abstract :
Problems due to the presence of resistive bridging faults within sequential functional blocks of self-checking circuits are studied, and design criteria aimed at reducing their effects are proposed
Keywords :
CMOS logic circuits; built-in self test; design for testability; fault location; integrated circuit testing; logic design; logic testing; sequential circuits; BIST; CMOS sequential circuits; bridging fault detection; design criteria; fault detectability; resistive bridging faults; self-checking circuits; sequential functional block;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19941351
