Title :
A general-purpose processor-per-pixel analog SIMD vision chip
Author :
Dudek, Piotr ; Hicks, Peter J.
Author_Institution :
Dept. of Electr. Eng. & Electron., Univ. of Manchester Inst. of Sci. & Technol., UK
Abstract :
A smart-sensor VLSI circuit suitable for focal-plane low-level image processing applications is presented. The architecture of the device is based on a fine-grain software-programmable SIMD processor array. Processing elements, integrated within each pixel of the imager, are implemented utilising a switched-current analog microprocessor concept. This allows the achievement of real-time image processing speeds with high efficiency in terms of silicon area and power dissipation. The prototype 21 × 21 vision chip is fabricated in a 0.6 μm CMOS technology and achieves a cell size of 98.6 μm × 98.6 μm. It executes over 1.1 giga instructions per second (GIPS) while dissipating under 40 mW of power. The architecture, circuit design and experimental results are presented in this paper.
Keywords :
CMOS analogue integrated circuits; CMOS image sensors; VLSI; analogue processing circuits; computer vision; focal planes; integrated circuit design; intelligent sensors; parallel architectures; 0.6 micron; CMOS imager; analog processor array; circuit design; fine-grain software-programmable SIMD processor array; focal-plane low-level image processing; power dissipation; processor-per-pixel analog SIMD vision chip; real-time image processing; smart-sensor VLSI circuit; switched-current analog microprocessor; Application software; CMOS technology; Circuits; Image processing; Microprocessors; Pixel; Power dissipation; Silicon; Software prototyping; Very large scale integration;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2004.840093
