An adaptive digital background calibration technique using variable step size LMS for pipelined ADC

This paper introduces an adaptive equalization based digital background technique suitable for correcting pipelined analog to digital converter (ADC) errors. Least mean square (LMS) technique with variable step size is used for adaptation. This technique is capable of fast tracking and calibration of different linear and nonlinear pipelined ADC errors. Different variable step size LMS prototypes are investigated and their performances are compared. The least number of iterations needed for convergence is found to be 5.8 KCycle. At input frequency of 9.99 MHz and sampling rate of 100 MSample/s, the calibration technique shows 42dB improvement in SFDR and 30dB in SNDR when deployed in a 12-bit pipelined ADC Simulink model. Furthermore, DNL of +0.25/-0.7 LSB and INL of +1.22/-2.3 are detected for the calibrated signal.