• DocumentCode
    120648
  • Title

    A 40GS/s low-power BiCMOS comparator for ultra-high speed ADC

  • Author

    He WenWei ; Meng Qiao

  • Author_Institution
    Inst. of RF- & OE-ICs, Southeast Univ., Nanjing, China
  • fYear
    2014
  • fDate
    23-25 July 2014
  • Firstpage
    934
  • Lastpage
    937
  • Abstract
    This paper presents a 40GS/s low-power Bipolar Complementary Metal-Oxide Semiconductor (BiCMOS) latched comparator for analog to digital converter (ADC). In this design, to achieve a low-power consumption and higher bandwidth, an active inductor load comprised by a BiCMOS transistor and a resister comparator is adopted in the circuit. Operating at Nyquist, the comparator can sample up to 40GS/s with an input sensitivity of less than 10 mV. The comparator is fabricated in 0.18μm SiGe BiCMOS technology with a chip area of 80×67 μm2. The total power consumption is approximately 28 mW from a 3.3V power supply. The proposed comparator can be applied to ultra-high-speed and low-power ADC.
  • Keywords
    BiCMOS integrated circuits; analogue-digital conversion; comparators (circuits); flip-flops; low-power electronics; BiCMOS transistor; Nyquist operation; SiGe; SiGe BiCMOS technology; analog to digital converter; bipolar complementary metal-oxide semiconductor; low-power BiCMOS latched comparator; low-power consumption; resister comparator; size 0.18 mum; ultrahigh speed ADC; voltage 3.3 V; Active inductors; BiCMOS integrated circuits; Communication systems; Heterojunction bipolar transistors; Latches; Sensitivity; Silicon germanium; ADC; BiCMOS; comparator; low-power; ultra-high-speed;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Communication Systems, Networks & Digital Signal Processing (CSNDSP), 2014 9th International Symposium on
  • Conference_Location
    Manchester
  • Type

    conf

  • DOI
    10.1109/CSNDSP.2014.6923963
  • Filename
    6923963