DocumentCode
1206688
Title
Autoscan: a scan design without external scan inputs or outputs
Author
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Volume
13
Issue
9
fYear
2005
Firstpage
1087
Lastpage
1095
Abstract
We propose a design-for-testability technique for synchronous sequential circuits called autoscan. Autoscan uses scan chains similar to conventional scan. However, it gives up the external scan inputs and outputs in order to eliminate the test data volume associated with them. Scan operations under autoscan improve the circuit testability by allowing the circuit state to be modified through shifting. Due to the removal of the scan inputs and outputs, synthesis of scan chains under autoscan does not have to satisfy all the constraints imposed on conventional scan chains. We describe a synthesis procedure for autoscan chains, and demonstrate that autoscan allows us to detect almost all the faults that are detectable using conventional scan. We use random sequences in order to show that sequential test generation is not necessary under autoscan. We also describe a test generation procedure, and discuss the effect of autoscan on fault diagnosis.
Keywords
automatic test pattern generation; design for testability; fault diagnosis; integrated circuit testing; sequential circuits; autoscan; design for testability technique; fault diagnosis; scan design; synchronous sequential circuits; test generation procedure; Circuit faults; Circuit synthesis; Circuit testing; Design for testability; Electrical fault detection; Fault detection; Flip-flops; Logic testing; Sequential analysis; Sequential circuits; Design-for-testability (DFT); scan design; synchronous sequential circuits; test generation;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2005.857157
Filename
1525041
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