A fully integrated low-IF CMOS GPS radio with on-chip analog image rejection

Author

Behbahani, Farbod ; Firouzkouhi, Hamid ; Chokkalingam, Ramesh ; Delshadpour, Siamak ; Kheirkhahi, Alireza ; Nariman, Mohammad ; Conta, Matteo ; Bhatia, Saket

Author_Institution

Valence Semicond. Inc., Irvine, CA, USA

Volume

37

Issue

12

fYear

2002

fDate

12/1/2002 12:00:00 AM

Firstpage

1721

Lastpage

1727

Abstract

A fully integrated Global Positioning System (GPS) radio is presented. Low-IF architecture was used for a high level of integration and low power consumption. An on-chip analog image-reject filter provides 18 dB of image-noise rejection to prevent noise figure (NF) degradation. With image rejection performed in the analog radio, a single-path (nonquadrature) output was used. The integrated synthesizer only requires an off-chip phase-locked loop-filter to function. Implemented in a 0.35-μm 2P4M CMOS process, the integrated radio has a chip area of 9.5 mm². The radio operates over a wide range of voltage and temperature, from 2.2 to 3.6 V and from -40°C to +85°C and consumes 27 mW from a 2.2-V supply. The receiver has 4 dB NF.

Keywords

CMOS integrated circuits; Global Positioning System; active filters; frequency synthesizers; low-power electronics; radio receivers; radiofrequency filters; -40 to 85 degC; 0.35 micron; 2.2 to 3.6 V; 27 mW; 2P4M CMOS process; 4 dB; Global Positioning System; VCO; image-noise rejection; integrated synthesizer; low power consumption; low-IF CMOS GPS radio; low-IF architecture; nonquadrature output; on-chip analog image rejection; single-path output; CMOS process; Degradation; Energy consumption; Filters; Global Positioning System; Noise figure; Noise measurement; Phase locked loops; Synthesizers; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2002.804355

Filename

1088100