DocumentCode
120739
Title
Multi-accelerator cluster runtime adaptation for enabling discrete concurrent-task applications
Author
Alankrutha, P. ; Deepika, H.V. ; Mangala, N. ; Babu, N. Sarat Chandra
Author_Institution
Hybrid Comput. Group, Centre for Dev. of Adv. Comput., Bangalore, India
fYear
2014
fDate
21-22 Feb. 2014
Firstpage
754
Lastpage
760
Abstract
Proliferation of GPGPU and other accelerators, is making the industry consider accelerator based systems as a viable option for high-performance: low-power HPC systems. This paper describes a multi-accelerator heterogeneous cluster in which each node has GPGPU and FPGA cards. Extracting the maximum computational power simultaneously of all the compute elements, i.e. multi-core CPU, GPGPU and FPGA is an important challenge. StarPU is a popular open source runtime that supports heterogeneous architectures. This paper describes the key features of heterogeneous runtime and how StarPU has been adapted to execute parallel programs which span across both GPGPU and FPGA accelerators.
Keywords
field programmable gate arrays; graphics processing units; multiprocessing systems; parallel processing; FPGA cards; GPGPU; StarPU; discrete concurrent-task applications; heterogeneous architectures; low-power HPC systems; multiaccelerator cluster runtime adaptation; open source runtime; Conferences; Decision support systems; Handheld computers; Cluster; FPGA; GPGPU; Heterogeneous; Runtime;
fLanguage
English
Publisher
ieee
Conference_Titel
Advance Computing Conference (IACC), 2014 IEEE International
Conference_Location
Gurgaon
Print_ISBN
978-1-4799-2571-1
Type
conf
DOI
10.1109/IAdCC.2014.6779418
Filename
6779418
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