DocumentCode :
1207624
Title :
A VLSI Architecture and Algorithm for Lucas–Kanade-Based Optical Flow Computation
Author :
Mahalingam, Venkataraman ; Bhattacharya, Koustav ; Ranganathan, Nagarajan ; Chakravarthula, Hari ; Murphy, Robin Roberson ; Pratt, Kevin Sheldon
Author_Institution :
Dept. of Comput. Sci. & Eng. (CSE), Univ. of South Florida, Tampa, FL, USA
Volume :
18
Issue :
1
fYear :
2010
Firstpage :
29
Lastpage :
38
Abstract :
Optical flow computation in vision-based systems demands substantial computational power and storage area. Hence, to enable real-time processing at high resolution, the design of application-specific system for optic flow becomes essential. In this paper, we propose an efficient VLSI architecture for the accurate computation of the Lucas-Kanade (L-K)-based optical flow. The L-K algorithm is first converted to a scaled fixed-point version, with optimal bit widths, for improving the feasibility of high-speed hardware implementation without much loss in accuracy. The algorithm is mapped onto an efficient VLSI architecture and the data flow exploits the principles of pipelining and parallelism. The optical flow estimation involves several tasks such as Gaussian smoothing, gradient computation, least square matrix calculation, and velocity estimation, which are processed in a pipelined fashion. The proposed architecture was simulated and verified by synthesizing onto a Xilinx Field Programmable Gate Array, which utilize less than 40% of system resources while operating at a frequency of 55 MHz. Experimental results on benchmark sequences indicate 42% improvement in accuracy and a speed up of five times, compared to a recent hardware implementation of the L-K algorithm.
Keywords :
VLSI; computer vision; field programmable gate arrays; fixed point arithmetic; gradient methods; least squares approximations; pipeline processing; smoothing methods; Gaussian smoothing; L-K algorithm; Lucas-Kanade-Based optical flow computation; VLSI algorithm; VLSI architecture; Xilinx; field programmable gate array; gradient computation; least square matrix calculation; optical flow estimation; pipelined fashion; real time processing; scaled fixed point version; velocity estimation; vision based system; Field-programmable gate array (FPGA) implementation; Lucas–Kanade algorithm; VLSI architecture; optical flow;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2008.2006900
Filename :
4806133
Link To Document :
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