• DocumentCode
    120829
  • Title

    Mixed precision multilevel Monte Carlo on hybrid computing systems

  • Author

    Brugger, Christian ; de Schryver, Christian ; Wehn, Norbert ; Omland, Steffen ; Hefter, Mario ; Ritter, Klaus ; Kostiuk, Anton ; Korn, Ralf

  • Author_Institution
    Microelectron. Syst. Design, Univ. of Kaiserslautern, Kaiserslautern, Germany
  • fYear
    2014
  • fDate
    27-28 March 2014
  • Firstpage
    215
  • Lastpage
    222
  • Abstract
    Nowadays, high-speed computations are mandatory for financial and insurance institutes to survive in competition and to fulfill the regulatory reporting requirements that have just toughened over the last years. A majority of these computations are carried out on huge computing clusters, which are an ever increasing cost burden for the financial industry. There, state-of-the-art CPU and GPU architectures execute arithmetic operations with pre-defined precisions only, that may not meet the actual requirements for a specific application. Reconfigurable architectures like field programmable gate arrays (FPGAs) have a huge potential to accelerate financial simulations while consuming only very low energy by exploiting dedicated precisions in optimal ways. In this work we present a novel methodology to speed up multilevel Monte Carlo (MLMC) simulations on reconfigurable architectures. The idea is to aggressively lower the precisions for different parts of the algorithm without loosing any accuracy at the end. For this, we have developed a novel heuristic for selecting an appropriate precision at each stage of the simulation that can be executed with low costs at runtime. Further, we introduce a cost model for reconfigurable architectures and minimize the cost of our algorithm without changing the overall error. We consider the showcase of pricing Asian options in the Heston model. For this setup we improve one of the most advanced simulation methods by a factor of 3-9x on the same platform.
  • Keywords
    Monte Carlo methods; field programmable gate arrays; financial management; graphics processing units; insurance; pricing; reconfigurable architectures; Asian options; CPU architectures; FPGA; GPU architectures; Heston model; MLMC simulations; field programmable gate arrays; financial institutes; high-speed computations; hybrid computing systems; insurance institutes; mixed precision multilevel Monte Carlo simulations; pricing; reconfigurable architectures; Accuracy; Computational modeling; Computer architecture; Field programmable gate arrays; Hardware; Pricing; Runtime;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computational Intelligence for Financial Engineering & Economics (CIFEr), 2104 IEEE Conference on
  • Conference_Location
    London
  • Type

    conf

  • DOI
    10.1109/CIFEr.2014.6924076
  • Filename
    6924076