Title :
Formal control techniques for power-performance management
Author :
Wu, Qiang ; Juang, Philo ; Martonosi, Margaret ; Peh, Li-Shiuan ; Clark, Douglas W.
Author_Institution :
Dept. of Comput. Sci., Princeton Univ., NJ, USA
Abstract :
These techniques determine when to speed up a processor to reach performance targets and when to slow it down to save energy. They use dynamic voltage and frequency scaling to balance speed and avoid worst case frequency limitations for both multiple-clock-domain and chip multiprocessors.
Keywords :
microprocessor chips; power consumption; chip multiprocessors; dynamic frequency scaling; dynamic voltage scaling; formal control techniques; multiple-clock-domain; power-performance management; speed balancing; worst case frequency limitations; Aerodynamics; Algorithm design and analysis; Clocks; Control systems; Dynamic voltage scaling; Energy management; Frequency; Microprocessors; Power dissipation; Voltage control; Power performance management; chip multiprocessors; dynamic voltage; frequency sealing; multiple-clock-domain;
Journal_Title :
Micro, IEEE
