• DocumentCode
    1209266
  • Title

    Storage-efficient, deadlock-free packet routing algorithms for torus networks

  • Author

    Cypher, Robert ; Gravano, Luis

  • Author_Institution
    Dept. of Comput. Sci., Johns Hopkins Univ., Baltimore, MD, USA
  • Volume
    43
  • Issue
    12
  • fYear
    1994
  • fDate
    12/1/1994 12:00:00 AM
  • Firstpage
    1376
  • Lastpage
    1385
  • Abstract
    We present two new packet routing algorithms for parallel computers with torus interconnection networks of arbitrary size and dimension. Both algorithms use only minimal length paths, are fully adaptive in the sense that all minimal length paths may be used to avoid congestion, and are free of deadlock, livelock and starvation. Algorithm 1 requires only three central queues per routing node. It is the first known minimal length packet routing algorithm for torus networks which requires a constant number of queues per node, regardless of the size and dimension of the torus. In fact, the requirement of three queues per node is optimal, as no such algorithm is possible when all nodes have two or fewer queues. Algorithm 2 requires only that each node have two input buffers per edge. It is the first known minimal-fully-adaptive packet routing algorithm for torus networks which does not require central queues and which does not require any node to have more than two input or two output buffers per edge. Both algorithms are simple and appear to be well-suited to VLSI implementation. They can be used with either store-and-forward or virtual cut-through routing
  • Keywords
    VLSI; multiprocessor interconnection networks; packet switching; VLSI implementation; deadlock-free packet routing algorithms; minimal length packet routing; torus interconnection networks; torus networks; Application software; Bandwidth; Computer networks; Computer science; Concurrent computing; Image processing; Multiprocessor interconnection networks; Routing; System recovery; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.338097
  • Filename
    338097