Title :
Plasma-etching technology with in situ etched-surface modification for highly reliable low-k/Cu dual damascene interconnects
Author :
Ohtake, Hiroto ; Saito, Shinobu ; Tada, Munehiro ; Onodera, Takahiro ; Hayashi, Yoshihiro
Author_Institution :
Syst. Devices Res. Labs., NEC Corp., Kanagawa, Japan
Abstract :
The plasma-etching technology presented in this paper is for fabricating highly reliable Cu dual damascene interconnects (DDI) with organic low-k film through modification of the in situ etched surface during low-k etching. Nitrogen-based plasma with oxygen and high-molecular-weight fluorocarbon gas (C>2) chemically modifies the sidewall surface of the etched low-k film, changing it into the carbon nitride with fluorocarbon-polymer passivation from the etching gas. After wet cleaning, the fluorocarbon-polymer is removed selectively, leaving a carbon nitride modified layer (CNL) on the sidewall. The CNL has been found to suppress Cu diffusion into the low-k film. A stacked barrier structure of conventional barrier metal and CNL is expected to have high tolerance to Cu diffusion. Combining a dual-hard-mask etching sequence with the CNL modification, Cu DDIs with organic low-k film were fabricated with high yield.
Keywords :
cleaning; copper; integrated circuit interconnections; integrated circuit yield; organic compounds; passivation; plasma materials processing; semiconductor device reliability; sputter etching; CNL modification; Cu; carbon nitride modified layer; dual-hard-mask etching sequence; fluorocarbon-polymer passivation; in situ etched-surface modification; integrated circuit interconnections; low-k dual damascene interconnects; nitrogen-based plasma; organic low-k film; plasma materials processing; plasma-etching technology; sidewall surface modification; sputter etching; wet cleaning; Atherosclerosis; Chemical technology; Copper; Etching; Fabrication; Integrated circuit interconnections; Plasma applications; Plasma chemistry; Plasma materials processing; Polymers; damascene; interconnects; low dielectric (low-; plasma etching;
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
DOI :
10.1109/TSM.2005.858513