Title :
Fault-tolerant dynamic multilevel storage in analog VLSI
Author :
Cauwenberghs, Gert ; Yariv, Amnon
Author_Institution :
Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD, USA
fDate :
12/1/1994 12:00:00 AM
Abstract :
We present an area-efficient dynamic storage technique for repetitively quantizing and refreshing the analog contents of volatile capacitive memories in VLSI, incorporating redundancy and statistical averaging to avoid sudden loss of information triggered by occasional errors in the quantization. Experimental results obtained from a CMOS implementation are included, validating the robustness of the refresh scheme for long-term analog storage in excess of 8 bit resolution
Keywords :
CMOS analogue integrated circuits; CMOS memory circuits; VLSI; analogue storage; fault tolerant computing; quantisation (signal); redundancy; CMOS implementation; analog VLSI; analog storage; area-efficiency; errors; fault-tolerant dynamic multilevel storage; quantization; redundancy; refresh scheme; robustness; statistical averaging; volatile capacitive memories; Adaptive signal processing; Circuits; Error correction; Fault tolerance; Neural networks; Quantization; Redundancy; Robustness; Signal processing; Very large scale integration;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
