DocumentCode :
121134
Title :
GOP level parallelism implementation for real-time H264/AVC video encoder on multicore DSP TMS320C6472
Author :
Bahri, Nejmeddine ; Grandpierre, Thierry ; Ben Ayed, M. Ali ; Masmoudi, N. ; Akil, Mohamed
Author_Institution :
ESIEE Eng. / LIGM Lab., Univ. Paris-Est, Champs-sur-Marne, France
fYear :
2014
fDate :
11-12 Sept. 2014
Firstpage :
152
Lastpage :
156
Abstract :
In this paper, we exploit the parallelism offered by six-core Digital Signal Processor (DSP) TMS320C6472 to implement the H264/AVC video encoder in order to meet the real-time constraint for different video resolutions. To enhance the encoding speed, GOP Level Parallelism approach is implemented on 5 slave DSP cores. A master core is reserved to manage data transfers among DSP memory and personal computer in order to perform a real-time video encoding demo taken into account video capture and bit-stream storage. Multithreading algorithm and ping-pong buffers technique are used in order to optimize the communication overhead. Experimental results show that our enhanced implementation allows to overcome the real-time constraint by reaching up to 120 f/s (frame/second) for Common Intermediate Format resolution (CIF 352×288) and 35f/s for Standard Definition (SD 720×480). Our proposed approach can save about 80% of run-time for High Definition resolution (HD 1280×720). The Enhanced GOP Level parallelism approach on five DSP cores achieves a good average speedup factor of 4.88 without inducing any quality degradation or bit-rate increment.
Keywords :
digital signal processing chips; multi-threading; multiprocessing systems; video codecs; video coding; CIF 352x288; DSP cores; DSP memory; GOP level parallelism implementation; HD 1280x720; SD 720x480; bit-rate increment; bit-stream storage; common intermediate format resolution; high definition resolution; multicore DSP TMS320C6472; multithreading algorithm; ping-pong buffer technique; quality degradation; real-time H264-AVC video encoder; real-time constraint; real-time video encoding; six-core digital signal processor; standard definition; video capture; video resolutions; Digital signal processing; Encoding; Multicore processing; Parallel processing; Real-time systems; Streaming media; Video coding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Education and Research Conference (EDERC), 2014 6th European Embedded Design in
Conference_Location :
Milano
Print_ISBN :
978-1-4799-6841-1
Type :
conf
DOI :
10.1109/EDERC.2014.6924378
Filename :
6924378
Link To Document :
بازگشت