Title :
A 1.8-GHz CMOS fractional-N frequency synthesizer with randomized multiphase VCO
Author :
Heng, Chun-Huat ; Song, Bang-Sup
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Illinois, Urbana-Champaign, IL, USA
fDate :
6/1/2003 12:00:00 AM
Abstract :
A 1.8 GHz fractional-N frequency synthesizer implemented in 0.6 μm CMOS with an on-chip multiphase voltage-controlled oscillator (VCO) exhibits no spurs resulting from phase interpolation. The proposed architecture randomly selects output phases of a multiphase VCO for fractional frequency division to eliminate spurious tones. Measured phase noise at 1.715 GHz is lower than -80 dBc/Hz within a 20 kHz loop bandwidth and -118 dBc/Hz at 1 MHz offset with no fractional spurs above -70 dBc/Hz. The synthesizer has a frequency resolution step smaller than 10 Hz. The chip consumes 52 mW at 3.3 V and occupies 3.7 mm×2.9 mm.
Keywords :
CMOS integrated circuits; UHF integrated circuits; delta-sigma modulation; frequency synthesizers; integrated circuit noise; interpolation; mixed analogue-digital integrated circuits; phase locked loops; phase noise; voltage-controlled oscillators; 0.6 micron; 1.715 GHz; 1.8 GHz; 20 kHz; 3.3 V; 52 mW; CMOS ASIC; CMOS fractional-N frequency synthesizer; MASH modulator; PLLs; fractional frequency division; multiphase voltage-controlled oscillator; on-chip multiphase VCO; phase interpolation; phase noise; phase-locked loops; randomized multiphase VCO; Bandwidth; Frequency conversion; Frequency measurement; Frequency synthesizers; Interpolation; Noise measurement; Phase measurement; Phase noise; Semiconductor device measurement; Voltage-controlled oscillators;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2003.811872
