Compact current-mode loser-take-all circuit

A CMOS circuit is presented that takes an array of analogue input currents and generates an array of binary output voltages in which the output corresponding to the minimum input current is high and all other outputs are low. This loser-take-all circuit also encodes the minimum current as a voltage that is distributed to all elements through a global wire. Because transistors operate in the subthreshold regime, a single compact cell implemented with as few as two transistors per cell dissipates power in the microwatt range. A three-cell loser-take-all circuit was fabricated using a MOSIS 2 μm p-well process, and experimental data are presented