• DocumentCode
    1212158
  • Title

    Design and evaluation of a current-mode multiple-valued PLA based on a resonant tunnelling transistor model

  • Author

    Deng, X. ; Hanyu, T. ; Kameyama, M.

  • Author_Institution
    Dept. of Comput. & Math. Sci., Tohoku Univ., Sendai, Japan
  • Volume
    141
  • Issue
    6
  • fYear
    1994
  • fDate
    12/1/1994 12:00:00 AM
  • Firstpage
    445
  • Lastpage
    450
  • Abstract
    A resonant tunnelling transistor (RTT) model is defined. The current-voltage characteristic of the model can have multiple peaks, and the widths of each peak and valley can be set to any value. A multiple-valued universal literal (MVUL) circuit using the RTT model is presented as a basic building block in a multiple-valued programmable logic array (MVPLA). An MVPLA structure based on MVUL, AND, MIN, and linear sum operators is proposed for the implementation of multiple-valued systems. Since the MVUL circuit is designed using only one transistor, and the other basic building blocks are implemented by simple current-mode circuits, the proposed MVPLA becomes very compact. The layouts and SPICE simulations show that the proposed MVPLA is superior to other types of PLA in terms of size, delay and dynamic power dissipation if the RTT model is realised by an actual device
  • Keywords
    SPICE; current-mode logic; integrated circuit layout; logic design; multivalued logic; programmable logic arrays; resonant tunnelling transistors; SPICE simulation; current-mode multiple-valued PLA; current-voltage characteristic; delay; dynamic power dissipation; layout simulation; multiple-valued universal literal circuit; resonant tunnelling transistor model;
  • fLanguage
    English
  • Journal_Title
    Circuits, Devices and Systems, IEE Proceedings -
  • Publisher
    iet
  • ISSN
    1350-2409
  • Type

    jour

  • DOI
    10.1049/ip-cds:19941389
  • Filename
    338868