Efficient reverse converters for four-moduli sets { 2n-1, 2n, 2n+1, 2n+1-1} and {2n-1, 2n, 2n+1, 2n-1-1}

A new reverse conversion algorithm is presented for the four-moduli set {2ⁿ-1,2ⁿ,2ⁿ+1, 2ⁿ⁺¹-1}, for even values of n. The number theoretic properties of the popular three-moduli set {2ⁿ-1,2ⁿ, 2ⁿ+1} have been exploited to realise a VLSI efficient alternative to that reported in the literature. The architecture proposed for most time efficient implementation provides for about three times speed-up. Another four-moduli set {2ⁿ-1, 2ⁿ, 2ⁿ+1, 2^n-1-1} has also been proposed by further extending this algorithm in an attempt to better adjust to dynamic ranges that cannot be best represented by the former four-moduli set. Unlike the existing reverse converter for the four-moduli set {2ⁿ-1, 2ⁿ, 2ⁿ+1, 2^n-1-1}, the proposed architecture is shown to be more efficient both in terms of area and time, mainly due to deploying the properties of the three-moduli set {2ⁿ-1, 2ⁿ, 2ⁿ+1}. Moreover, adder-based architectures for each moduli set lend themselves well to VLSI efficient implementations. Finally, both the architectures can be readily pipelined to achieve higher throughputs.