• DocumentCode
    1213781
  • Title

    Cryptanalysis with COPACOBANA

  • Author

    Guneysu, Tim ; Kasper, Timo ; Novotny, M. ; Paar, Christof ; Rupp, Andy

  • Author_Institution
    Horst Gortz Inst. for IT-Security, Ruhr- Univ. Bochum, Bochum
  • Volume
    57
  • Issue
    11
  • fYear
    2008
  • Firstpage
    1498
  • Lastpage
    1513
  • Abstract
    Cryptanalysis of ciphers usually involves massive computations. The security parameters of cryptographic algorithms are commonly chosen so that attacks are infeasible with available computing resources. This contribution presents a variety of cryptanalytical applications utilizing the COPACOBANA (Cost-Optimized Parallel Code Breaker) machine which is a high-performance, low-cost cluster consisting of 120 Field Programmable Gate Arrays (FPGA). COPACOBANA appears to be the only such reconfigurable parallel FPGA machine optimized for code breaking tasks reported in the open literature. Depending on the actual algorithm, the parallel hardware architecture can outperform conventional computers by several orders of magnitude. In this work, we will focus on novel implementations of cryptanalytical algorithms, utilizing the impressive computational power of COPACOBANA. We describe various exhaustive key search attacks on symmetric ciphers and demonstrate an attack on a security mechanism employed in the electronic passport. Furthermore, we describe time-memory tradeoff techniques which can, e.g., be used for attacking the popular A5/1 algorithm used in GSM voice encryption. In addition, we introduce efficient implementations of more complex cryptanalysis on asymmetric cryptosystems, e.g., Elliptic Curve Cryptosystems (ECC) and number co-factorization for RSA.
  • Keywords
    cellular radio; field programmable gate arrays; parallel architectures; public key cryptography; A5/1 algorithm; COPACOBANA; GSM voice encryption; RSA; cost-optimized parallel code breaker machine; cryptanalysis; cryptographic algorithms; electronic passport; elliptic curve cryptosystems; number cofactorization; parallel hardware architecture; reconfigurable parallel FPGA machine; security parameters; Application software; Computer architecture; Concurrent computing; Costs; Distributed computing; Elliptic curve cryptography; Field programmable gate arrays; Hardware; Runtime; Security; Cryptanalysis; Reconfigurable hardware; Special-Purpose and Application-Based Systems;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.2008.80
  • Filename
    4515858