Title :
A robust self-calibrating transmission scheme for on-chip networks
Author :
Worm, Frédéric ; Ienne, Paolo ; Thiran, Patrick ; De Micheli, Giovanni
Author_Institution :
Processor Archit. Lab., Swiss Fed. Inst. of Technol. Lausanne, Switzerland
Abstract :
Systems-on-Chip (SoC) design involves several challenges, stemming from the extreme miniaturization of the physical features and from the large number of devices and wires on a chip. Since most SoCs are used within embedded systems, specific concerns are increasingly related to correct, reliable, and robust operation. We believe that in the future most SoCs will be assembled by using large-scale macro-cells and interconnected by means of on-chip networks. We examine some physical properties of on-chip interconnect busses, with the goal of achieving fast, reliable, and low-energy communication. These objectives are reached by dynamically scaling down the voltage swing, while ensuring data integrity-in spite of the decreased signal to noise ratio-by means of encoding and retransmission schemes. In particular, we describe a closed-loop voltage swing controller that samples the error retransmission rate to determine the operational voltage swing. We present a control policy which achieves our goals with minimal complexity; such simplicity is demonstrated by implementing the policy in a synthesizable controller. Such a controller is an embodiment of a self-calibrating circuit that compensates for significant manufacturing parameter deviations and environmental variations. Experimental results show that energy savings amount up to 42%, while at the same time meeting performance requirements.
Keywords :
VLSI; closed loop systems; embedded systems; error detection codes; error statistics; integrated circuit design; integrated circuit interconnections; integrated circuit reliability; system-on-chip; voltage control; SNR; SOC; VLSI; closed loop voltage swing controller; data integrity; embedded systems; encoding; error retransmission rate; large scale macrocells; low energy communication; manufacturing parameter deviations; on-chip interconnect busses; on-chip networks; physical properties; reliable operation; retransmission schemes; robust operation; robust self calibrating transmission scheme; self calibrating circuit; signal-noise ratio; systems-on-chip design; Assembly; Embedded system; Integrated circuit interconnections; Large-scale systems; Network-on-a-chip; Robustness; Signal to noise ratio; Telecommunication network reliability; Voltage; Wires; Electrical parameter variations; VLSI design methodology; interconnect for networks-on-chip; low-power systems-on-chip (SoC); self-calibrating designs;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2004.834241