DocumentCode :
1214596
Title :
A 1-V 1.25-GS/S 8-Bit Self-Calibrated Flash ADC in 90-nm Digital CMOS
Author :
Yu, Hairong ; Chang, Mau-Chung Frank
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA
Volume :
55
Issue :
7
fYear :
2008
fDate :
7/1/2008 12:00:00 AM
Firstpage :
668
Lastpage :
672
Abstract :
We present an 8-bit 1.25-GS/s flash analog-to-digital converter (ADC) in 90-nm digital CMOS with wide analog input bandwidth and low power dissipation. The ADC employs two key techniques: a self-biased track-and-hold amplifier which enhances the ADC full-scale voltage and enables the converter operating under a single 1-V supply; and an improved calibration scheme based on reference pre-distortion to enhance the ADC linearity without sacrificing its sampling speed. The prototype converter thus achieves 7-, 6.9-, 6.5-bit ENOB at 1.25 GS/s for input signal frequencies of 10 MHz, 600 MHz, and 1.3 GHz, respectively, and better than 52-dB SFDR across the full Nyquist-band, while dissipating 207 mW from a single 1-V supply.
Keywords :
CMOS memory circuits; amplifiers; analogue-digital conversion; convertors; flash memories; nanoelectronics; ADC full-scale voltage; Nyquist-band; analog input bandwidth; digital CMOS; frequency 1.3 GHz; frequency 10 MHz; frequency 600 MHz; power 207 mW; power dissipation; self-biased track-and-hold amplifier; self-calibrated flash analog-to-digital converter; size 90 nm; suprious-free dynamic range; voltage 1 V; Calibration; flash analog-to-digital converter (ADC); offset correction; source follower; unity-gain buffer;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-7747
Type :
jour
DOI :
10.1109/TCSII.2008.921596
Filename :
4515949
Link To Document :
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