The Effect of the Integrator-Dump Circuit on PCM/FM Error Rates

Schilling et al. [l965] proposed a method of predicting error rates in FSK using the phase-locked loop (PLL) as a demodulator. They assumed a picture of error generation in which the errors are preponderantly due to the threshold impulses. The ont,put of the PLL is passed through a low-pass filter and then sampled at the center of the bit to determine the presence of a mark or a space. This communication shows that under the same assumed conditions the integrator-dump circuit is preferable over the simple lowpass filter. In the integrator-dump system the output of the FM demodulator is integrated over the bit period, a decision is made at the end of the bitp eriod, and the integrator contents ared umped to prepare for the next integration period.