DocumentCode :
1215338
Title :
An RLC interconnect model based on fourier analysis
Author :
Chen, Guoqing ; Friedman, Eby G.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Rochester, NY, USA
Volume :
24
Issue :
2
fYear :
2005
Firstpage :
170
Lastpage :
183
Abstract :
Based on a Fourier series analysis, an analytic interconnect model is presented which is suitable for periodic signals, such as a clock signal. In this model, the far-end time-domain waveform is approximated by the summation of several sinusoids. Closed-form solutions of the 50% delay and overshoots/undershoots are provided when the fifth and higher order harmonics are ignored. Good accuracy is observed between the model and SPICE simulations. The model is applied to resistance-capacitance-inductance interconnect trees and the computational complexity of the model is linear with the size of the tree and the model order. The tree model is shown to be an effective method to analyze clock distribution networks. The single interconnect model is also extended to coupled multi-interconnect systems to analyze crosstalk noise and a general waveform solution is obtained. It is noted that in addition to the transition time, the period of the aggressor signal also has a significant effect on the crosstalk noise.
Keywords :
Fourier analysis; RLC circuits; circuit simulation; integrated circuit interconnections; integrated circuit modelling; time-domain analysis; Fourier series analysis; RLC interconnect model; SPICE simulation; analytic interconnect model; clock distribution networks; clock tree synthesis; closed-form solution; computational complexity; coupled multi-interconnect systems; crosstalk noise analysis; far-end time-domain waveform; resistance-capacitance-inductance interconnect trees; very large scale integration; Clocks; Closed-form solution; Computational complexity; Computational modeling; Crosstalk; Delay; Fourier series; SPICE; Signal analysis; Time domain analysis;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2004.841065
Filename :
1386375
Link To Document :
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