Title :
A radiation-hardened 32-bit microprocessor based on the commercial CMOS process
Author :
Yoshioka, Shinichi ; Kamimura, Hiroshi ; Akiyama, Masatsugu ; Nakamura, Mitsuhiro ; Tamura, Takashi ; Kuboyama, Satoshi
Author_Institution :
Semicond. & Integrated Circuits Div., Hitachi Ltd., Tokyo, Japan
Abstract :
A radiation-hardened 32-bit microprocessor based on the commercial CMOS process, usable up to 1 kGy(Si), has been developed by (1) adding a silicon nitride passivation layer and (2) thinning the field oxide. Both techniques suppress the leakage current generated by the parasitic MOSFET, because its negative threshold voltage shift due to oxide trapped holes is decreased by the latter, and compensated by the positive shift due to the interface states generated during irradiation by hydrogen trapped in the oxide through the silicon-nitride deposition. The samples supplied with 4.5 V and 20 MHz clock were able to operate normally up to the total dose of 1.3 kGy(Si). The total dose tolerance of the samples was over 20 times as much as that of ones based on the commercial process.<>
Keywords :
CMOS digital integrated circuits; hole traps; integrated circuit reliability; integrated circuit technology; interface states; large scale integration; leakage currents; microprocessor chips; passivation; radiation effects; radiation hardening (electronics); 1 to 1.3 kGy; 20 MHz; 32 bit; 4.5 V; Si/sub 3/N/sub 4/; commercial CMOS process modification; field oxide thinning; interface states; leakage current suppression; negative threshold voltage shift; oxide trapped holes; parasitic MOSFET; passivation layer; radiation-hardened microprocessor; total dose tolerance; CMOS process; Clocks; Hydrogen; Interface states; Leakage current; MOSFET circuits; Microprocessors; Passivation; Silicon; Threshold voltage;
Journal_Title :
Nuclear Science, IEEE Transactions on
