DocumentCode
1216433
Title
Improving the performance of turbo codes with a simple protection scheme for error-prone bit positions
Author
Oh, Wangrok ; Kim, Youhan ; Cheun, Kyungwhoon
Author_Institution
Div. of Electr. & Comput. Eng., Pohang Univ. of Sci. & Technol., South Korea
Volume
53
Issue
11
fYear
2005
Firstpage
1777
Lastpage
1781
Abstract
It is well known that turbo codes provide highly unequal error protection within a transmitted frame. Previous attempts to exploit this fact focused mainly on adding additional redundancy to provide extra protection for the error-prone bit positions. Here, instead, we use the error-detection capability of the cyclic redundancy check (CRC), which is almost always employed in practical systems. Once a frame is declared uncorrectable by the CRC, a process termed the error-prone bit processing procedure is activated in an attempt to correct the probable error patterns which are a priori identified as being error-prone.
Keywords
cyclic redundancy check codes; iterative decoding; turbo codes; cyclic redundancy check; error detection; error protection; error-prone bit processing; iterative decoding; simple protection scheme; turbo code; Concatenated codes; Convolution; Convolutional codes; Cyclic redundancy check; Error correction; Error correction codes; Iterative decoding; Protection; Signal to noise ratio; Turbo codes; Cyclic redundancy check (CRC); iterative decoding; turbo codes;
fLanguage
English
Journal_Title
Communications, IEEE Transactions on
Publisher
ieee
ISSN
0090-6778
Type
jour
DOI
10.1109/TCOMM.2005.858653
Filename
1532470
Link To Document