DocumentCode
1217351
Title
Efficient scheduling and instruction selection for programmable digital signal processors
Author
Yu, Kin H. ; Hu, Yu Hen
Author_Institution
Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
Volume
42
Issue
12
fYear
1994
fDate
12/1/1994 12:00:00 AM
Firstpage
3549
Lastpage
3552
Abstract
We present an efficient method for optimized instruction selection and scheduling for programmable digital signal processors. Our approach uses artificial intelligence techniques to yield code that is comparable to that of hand-written assembly codes by DSP experts. Several examples which demonstrate the feasibility of the approach, targeted to the TMS32020/50 architecture, are presented
Keywords
computer aided software engineering; digital signal processing chips; knowledge based systems; processor scheduling; program compilers; telecommunication computing; DSP; TMS32020/50 architecture; artificial intelligence; code; optimized instruction selection; optimized scheduling; programmable digital signal processors; Artificial intelligence; Assembly; Computer architecture; Cost function; Digital signal processing; Digital signal processors; Optimization methods; Processor scheduling; Signal design; Software design;
fLanguage
English
Journal_Title
Signal Processing, IEEE Transactions on
Publisher
ieee
ISSN
1053-587X
Type
jour
DOI
10.1109/78.340798
Filename
340798
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