DocumentCode :
1217527
Title :
On the design and efficient implementation of the Farrow structure
Author :
Pun, Carson K S ; Wu, Y.C. ; Chan, S.C. ; Ho, K.L.
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ., China
Volume :
10
Issue :
7
fYear :
2003
fDate :
7/1/2003 12:00:00 AM
Firstpage :
189
Lastpage :
192
Abstract :
This article proposes an efficient implementation of the Farrow (1988) structure using sum-of-powers-of-two (SOPOT) coefficients and multiplier-block (MB). In particular, a novel algorithm for designing the Farrow coefficients in SOPOT form is detailed. Using the SOPOT coefficient representation, coefficient multiplication can be implemented with limited number of shifts and additions. Using MB, the redundancy between multipliers can be fully exploited through the reuse of the intermediate results generated. Design examples show that the proposed method can greatly reduce the complexity of the Farrow structure while providing comparable phase and amplitude responses.
Keywords :
delay filters; digital arithmetic; digital filters; network synthesis; Farrow coefficients; Farrow structure; SOPOT coefficient representation; additions; amplitude response; coefficient multiplication; efficient implementation; fractional-delay digital filters; multiplier-block; phase response; redundancy; shifts; sum-of-powers-of-two coefficients; Adders; Algorithm design and analysis; Application software; Delay; Digital filters; Filter bank; Modems; Sampling methods; Signal processing algorithms; Software radio;
fLanguage :
English
Journal_Title :
Signal Processing Letters, IEEE
Publisher :
ieee
ISSN :
1070-9908
Type :
jour
DOI :
10.1109/LSP.2003.813681
Filename :
1203780
Link To Document :
بازگشت