DocumentCode :
1217868
Title :
Application of a 3000-gate GaAs array in the development of a gigahertz digital test system
Author :
Schwab, Daniel J. ; Perkins, David F. ; Reeder, Thomas M. ; Gilbert, Barry K.
Author_Institution :
Mayo Clinic/Mayo Found., Rochester, MN, USA
Volume :
24
Issue :
4
fYear :
1989
fDate :
8/1/1989 12:00:00 AM
Firstpage :
1092
Lastpage :
1104
Abstract :
The characterization of a high-speed GaAs LSi gate array and its personalization as the central control chip for a gigahertz-rate digital test system are described. The array is a 1020-configurable-cell, 3000-gate device that utilizes a commercially available enhancement/depletion (E/D) mode IC process. The development and experimental evaluation of an array personalization designed to characterize all logic macros, the array speed-power performance, and a simple MSI arithmetic element are described. The results of the evaluation of this first design were used to design a digital tester control chip for use at clock rates of up to 1 GHz. Issues in the design of a digital tester are outlined, and the architectural features of a modular tester providing synchronous data acquisition, high-speed RAM control, and pattern generation are discussed
Keywords :
III-V semiconductors; automatic test equipment; field effect integrated circuits; gallium arsenide; large scale integration; logic arrays; GaAs; LSi gate array; array speed-power performance; central control chip; clock rates; digital tester; enhancement/depletion; gigahertz digital test system; logic macros; pattern generation; simple MSI arithmetic element; synchronous data acquisition; Arithmetic; Centralized control; Clocks; Control systems; Digital control; Gallium arsenide; Logic arrays; Logic design; Logic devices; System testing;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.34097
Filename :
34097
Link To Document :
بازگشت