DocumentCode
1217964
Title
Cell and circuit design for single-poly EPROM
Author
Hoe, David H K ; Schultz, Kenneth J. ; Salama, C. Andre T ; Hadaway, Robert A. ; Kempf, Paul
Author_Institution
Dept. of Electr. Eng., Toronto Univ., Ont., Canada
Volume
24
Issue
4
fYear
1989
fDate
8/1/1989 12:00:00 AM
Firstpage
1153
Lastpage
1157
Abstract
The design and characterization of single-poly erasable programmable read-only memory (EPROM) cells in a standard CMOS p-well technology are discussed. Process-compatible high-voltage drivers for programming the cells are presented. A memory array is implemented to illustrate the integration of the cells with standard logic circuitry
Keywords
CMOS integrated circuits; EPROM; integrated memory circuits; CMOS p-well technology; high-voltage drivers; memory array; programming; single-poly EPROM; standard logic circuitry; CMOS logic circuits; CMOS technology; Circuit synthesis; Driver circuits; EPROM; Logic arrays; Logic circuits; Logic programming; PROM; Programmable logic arrays;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.34106
Filename
34106
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