Fast structured design of VLSI circuits

Author

Smith, K.F. ; Gu, J.

Author_Institution

Dept. of Comput. Sci., Utah Univ., Salt Lake City, UT, USA

Volume

32

Issue

3

fYear

1989

fDate

8/1/1989 12:00:00 AM

Firstpage

246

Lastpage

258

Abstract

It is suggested that a structured, user-friendly, cost-effective tool for rapid implementation of VLSI circuits which encourages students to participate directly in research projects is the key component in digital integrated circuit (IC) education. The authors introduce their VLSI education activities, with emphasis on the presentation of path-programmable logic (PPL) design methodology as well as a short description of a representative student project. Students using PPL are able to implement MOS or GaAs VLSI circuits with several thousand to over 100000 transistors in a few weeks. They have designed and built numerous VLSI architectures and computer systems which play an influential role in various research areas

Keywords

VLSI; circuit CAD; digital integrated circuits; educational computing; GaAs; MOS; VLSI circuits; computer systems; digital integrated circuit; education; path-programmable logic; Circuit testing; Computer architecture; Computer science education; Computer vision; Digital integrated circuits; Educational programs; Hardware; Logic design; Programmable logic arrays; Very large scale integration;

fLanguage

English

Journal_Title

Education, IEEE Transactions on

Publisher

ieee

ISSN

0018-9359

Type

jour

DOI

10.1109/13.34156

Filename

34156