Biasing circuit for high input swing operational amplifiers

This paper introduces a biasing scheme that overcomes the inherent drawbacks associated with high input common-mode range (CMR) amplifiers: nonconstant transconductance (G_m) and very poor common-mode rejection ratio (CMRR). The proposed circuit achieves a constant amplifier G_m by maintaining a constant sum of the square-roots of the bias currents of the complementary input pairs, while the high rejection to input common-mode signals is achieved by making a gradual transition between these currents as function of the input common-mode component (V_{m, cm}). Experimental results obtained from a CMOS n-well 2 μm chip prototype with 5 V of total supply voltage, show a maximum transconductance deviation less than 5% from its value for a common-mode input voltage at midsupply, as well as a CMRR improvement of 12 dB with respect to the classical biasing scheme. Other representative figures of its experimental behavior are also given