Spur Model for a Fixed-Frequency Signal Subject to Periodic Jitter

This paper presents an automated algorithm that is capable of predicting both the location and magnitude of spurs that are caused by different sources of jitter on a periodic signal. A practical circuit that produces this kind of jittered periodic signal is the direct digital period synthesis (DDPS) circuit that can be used as a flexible clock source for various applications such as adjusting a sampling rate in a measurement and signal processing. Points of interest with clocks that are subject to periodic perturbations are their spectral purity and jitter characteristics. Our algorithm is applied to the DDPS to greatly reduce the simulation time that is needed to accurately compute the spectrum of the signal and its spurious frequency content. The method is used to explore how the operating parameters of the DDPS influence the spectral purity of its output. The generic analysis method that has been used in this paper can be transposed to fractional-N synthesizers, delay-line-based direct digital synthesizers, or serializers.