Title :
An 11000-fuse electrically erasable programmable logic device (EEPLD) with an extended macrocell
Author :
Wahlstrom, Sven E. ; Fong, Edison ; Chung, Michael S C ; Gan, Jimmy ; Chen, Jimmy
Author_Institution :
Adv. Micro Devices, Sunnyvale, CA, USA
Abstract :
A high-performance electrically erasable programmable logic device (EEPLD) has been designed and fabricated using a 1.5- mu m n-well CMOS technology. The chip has 11040 fuses which are used not only in the logic array but also in the input/output macrocell. Typical access time for the nonregistered version is 35 ns with a power dissipation of 450 mW. There are 16 input/output macrocells which are architecturally defined by 128 electrically programmable fuses. Die size is 130*230 mils.<>
Keywords :
CMOS integrated circuits; PROM; cellular arrays; integrated logic circuits; 1.5 micron; 35 ns; 450 mW; EEPLD; EEPROM technology; PLD; access time; electrically erasable programmable logic device; extended macrocell; fuse type; input/output macrocell; logic array; n-well CMOS technology; power dissipation; CMOS logic circuits; CMOS technology; EPROM; Fuses; Gallium nitride; Logic arrays; Logic devices; Macrocell networks; Programmable logic arrays; Programmable logic devices;
Journal_Title :
Solid-State Circuits, IEEE Journal of
