DocumentCode :
1220022
Title :
Processing of fluxing underfills for flip chip-on-laminate assembly
Author :
Zhao, Renzhe ; Johnson, R. Wayne ; Jones, Greg ; Yaeger, Erin ; Konarski, Mark ; Krug, Paul ; Crane, Lawrence Larry
Author_Institution :
ECE Dept., Auburn Univ., AL, USA
Volume :
26
Issue :
1
fYear :
2003
Firstpage :
75
Lastpage :
83
Abstract :
Fluxing underfill eliminates process steps in the assembly of flip chip-on-laminate (FCOL) when compared to conventional capillary flow underfill processing. In the fluxing underfill process, the underfill is dispensed onto the board prior to die placement. During placement, the underfill flows in a "squeeze flow" process until the solder balls contact the pads on the board. The material properties, the dispense pattern and resulting shape, solder mask design pattern, placement force, placement speed, and hold time all impact the placement process and the potential for void formation. A design of experiments was used to optimize the placement process to minimize placement-induced voids. The major factor identified was board design, followed by placement acceleration. During the reflow cycle, the fluxing underfill provides the fluxing action required for good wetting and then cures by the end of the reflow cycle. With small, homogeneous circuit boards it is relatively easy to develop a reflow profile to achieve good solder wetting. However, with complex SMT assemblies involving components with significant thermal mass this is more challenging.
Keywords :
assembling; chip-on-board packaging; circuit reliability; delamination; design of experiments; failure analysis; flip-chip devices; laminates; printed circuit manufacture; reflow soldering; surface mount technology; thermal shock; voids (solid); wetting; -40 to 125 C; 1 min; 5 min; DOE; FCOL; SMT PCBs; SMT assemblies; assembly characteristic life; complex PWBs; design of experiments; die placement; dispense pattern; flip chip-on-laminate assembly; fluxing underfill process; liquid-to-liquid thermal shock testing; placement force; placement process optimization; placement speed; placement-induced voids minimization; predictive software tools; reflow cycle; reflow profile; reliability testing; solder balls; solder mask; thermal mass; void formation; wetting; Assembly; Cranes; Electronics packaging; Flip chip; Material properties; Moisture; Organic materials; Shape; Surface-mount technology; Temperature;
fLanguage :
English
Journal_Title :
Electronics Packaging Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-334X
Type :
jour
DOI :
10.1109/TEPM.2003.813007
Filename :
1205225
Link To Document :
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